VMIVME-4905模块全新现货

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及时捕获给定实例中所有四个计时器的值。然而，通过将该位设置为“1”，所有四个定时器输出将仅在读取定时器1和2电流计数寄存器（TMRCCR12）时锁定。因此，要同时捕获所有四个计时器的当前计数，请先读取TMRCCR12（使用32位读取），然后读取TMRCCR3和TMRCCR4。一次读取（到TMRCCR12寄存器）导致同时锁存所有四个计时器值。随后对TMRCCR3和TMRCCR4寄存器的读取不会锁定新的计数值，从而可以及时获取同一实例中所有计时器的计数。计时器1和2加载计数寄存器（TMRLCR12）计时器1和2的宽度为16位，从位于BAR2地址偏移量0x10处的计时器1和2加载计数寄存器（TMRLCR12）获取其加载计数。该寄存器中的位映射如下：当写入这些字段中的任何一个（通过单个32位写入或单独的16位写入）时，相应的计时器在计时器时钟的下一个上升沿加载写入值，无论计时器是启用还是禁用。存储在该寄存器中的值也会在计时器的终端计数（或超时）时自动重新加载。计时器3加载计数寄存器（TMRLCR3）计时器3的宽度为32位，从位于BAR2中地址偏移量0x14处的计时器3加载计数寄存器（TMRLCR3）获取其加载计数。该寄存器中的位映射如下：写入该字段时，定时器3在定时器时钟的下一个上升沿加载写入值，无论定时器是启用还是禁用。存储在该寄存器中的值也会在计时器的终端计数（或超时）时自动重新加载。字段位读取或写入计时器2加载计数TMRLCR12[31..16]R/W计时器1加载计数TMRLCR12[15..0]R/W字段位读取或写入计时器3加载计数TMRLCR3[31..0]R/W

capture the values of all four timers at a given instance in time. However, by setting this bit to “1”, all four timer outputs will be latched only on reads to the Timer 1 & 2 Current Count Register (TMRCCR12). Therefore, to capture the current count of all four timers at the same time, perform a read to the TMRCCR12 first (with a 32-bit read), followed by a read to TMRCCR3 and TMRCCR4. The first read (to the TMRCCR12 register) causes all four timer values to be latched at the same time. The subsequent reads to the TMRCCR3 and TMRCCR4 registers do not latch new count values, allowing the count of all timers at the same instance in time to be obtained. Timer 1 & 2 Load Count Register (TMRLCR12) Timers 1 & 2 are 16-bits wide and obtain their load count from the Timer 1 & 2 Load Count Register (TMRLCR12), located at offset 0x10 from the address in BAR2. The mapping of bits in this register are as follows: When either of these fields are written (either by a single 32-bit write or separate 16-bit writes), the respective timer is loaded with the written value on the next rising edge of the timer clock, regardless of whether the timer is enabled or disabled. The value stored in this register is also automatically reloaded on terminal count (or timeout) of the timer. Timer 3 Load Count Register (TMRLCR3) Timer 3 is 32-bits wide and obtains its load count from the Timer 3 Load Count Register (TMRLCR3), located at offset 0x14 from the address in BAR2. The mapping of bits in this register are as follows: When this field is written, Timer 3 is loaded with the written value on the next rising edge of the timer clock, regardless of whether the timer is enabled or disabled. The value stored in this register is also automatically reloaded on terminal count (or timeout) of the timer. Field Bits Read or Write Timer 2 Load Count TMRLCR12[31..16] R/W Timer 1 Load Count TMRLCR12[15..0] R/W Field Bits Read or Write Timer 3 Load Count TMRLCR3[31..0] R/W